NVIDIA ISA Viewer

FSWZADD

FP32 Swizzle Add

1 variant on SM75 (Turing)

FSWZADD

R,R,R,SwzAdd

distilled: @P0 FSWZADD R0, R0, R0, PPPPPPPP;

key: FSWZADD_R_R_R_SwzAdd

0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7
0	1	0	0	0	1	0	0	0	0	0	1	pred				operand 0								operand 1								operand 3								0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0
0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7
operand 2								0	0	0	0	0	NDV	modi 1		FTZ	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	stall				y	r-bar			w-bar			b-mask						reuse				0	0

Modifier Group 1

Binary	Value
00	(default)
01	RM
10	RP
11	RZ