NVIDIA ISA Viewer

LDC

Load Constant

4 variants on SM100 (B200)

LDC

R,cx[UR][R]

distilled: @P0 LDC.U8 R0, cx[UR0][R0] ;

key: LDC_R_UR_R

0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7
0	1	0	0	0	0	0	1	1	0	1	0	pred				operand 0								operand 1								0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0
0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7
operand 2								0	modi 1			0	0	modi 2		0	0	0	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	stall				y	r-bar			w-bar			b-mask						reuse				0	0

Modifier Group 1

Binary	Value
000	U8
001	S8
010	U16
011	S16
100	(default)
101	64
110	INVALID6
111	INVALID7

Modifier Group 2

Binary	Value
00	(default)
01	IL
10	IS
11	ISL

LDC

R,c[I][R]

distilled: @P0 LDC.U8 R0, c[0x0][R0] ;

key: LDC_R_I_R

0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7
0	1	0	0	0	0	0	1	1	1	0	1	pred				operand 0								operand 2								0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	operand 1					0	0	0	0	0
0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7
0	0	0	0	0	0	0	0	0	modi 1			0	0	modi 2		0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	stall				y	r-bar			w-bar			b-mask						reuse				0	0

Modifier Group 1

Binary	Value
000	U8
001	S8
010	U16
011	S16
100	(default)
101	64
110	INVALID6
111	INVALID7

Modifier Group 2

Binary	Value
00	(default)
01	IL
10	IS
11	ISL

LDC

R,c[I][R+I]

distilled: @P0 LDC.U8 R0, c[0x0][R0+0x1] ;

key: LDC_R_I_R_I

0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7
0	1	0	0	0	0	0	1	1	1	0	1	pred				operand 0								operand 2								0	0	0	0	0	0	operand 3															operand 1						0	0	0	0	0
0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7
0	0	0	0	0	0	0	0	0	modi 1			0	0	modi 2		0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	stall				y	r-bar			w-bar			b-mask						reuse				0	0

Modifier Group 1

Binary	Value
000	U8
001	S8
010	U16
011	S16
100	(default)
101	64
110	INVALID6
111	INVALID7

Modifier Group 2

Binary	Value
00	(default)
01	IL
10	IS
11	ISL

LDC

R,cx[UR][R+I]

distilled: @P0 LDC.U8 R0, cx[UR0][R0+0x1] ;

key: LDC_R_UR_R_I

0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7
0	1	0	0	0	0	0	1	1	0	1	0	pred				operand 0								operand 1								0	0	0	0	0	0	operand 3																0	0	0	0	0	0	0	0	0	0
0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7
operand 2								0	modi 1			0	0	modi 2		0	0	0	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	stall				y	r-bar			w-bar			b-mask						reuse				0	0

Modifier Group 1

Binary	Value
000	U8
001	S8
010	U16
011	S16
100	(default)
101	64
110	INVALID6
111	INVALID7

Modifier Group 2

Binary	Value
00	(default)
01	IL
10	IS
11	ISL