NVIDIA ISA Viewer

IADD

Integer Addition

6 variants on SM100 (B200)

IADD.X.XOR

R,P,R,R,R,P

distilled: @P0 IADD.X.XOR R0, P0, R0, R0, R0, P0;

key: IADD_R_P_R_R_R_P

0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7
0	0	0	0	1	0	0	0	0	1	0	0	pred				operand 0								operand 2								operand 3								0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	cINV
0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7
operand 4								cINV	0	1	0	1	0	0	0	operand 1				0	0	operand 5				cNOT	0	0	0	0	0	0	0	0	0	0	0	0	0	0	stall				y	r-bar			w-bar			b-mask						reuse				0	0

IADD.X.XOR

R,P,R,I,R,P

distilled: @P0 IADD.X.XOR R0, P0, R0, 0x0, R0, P0;

key: IADD_R_P_R_I_R_P

0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7
0	0	0	0	1	0	0	0	0	0	0	1	pred				operand 0								operand 2								operand 3
0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7
operand 4								cINV	0	1	0	1	0	0	0	operand 1				0	0	operand 5				cNOT	0	0	0	0	0	0	0	0	0	0	0	0	0	0	stall				y	r-bar			w-bar			b-mask						reuse				0	0

IADD.X.XOR

R,P,R,UR,R,P

distilled: @P0 IADD.X.XOR R0, P0, R0, UR0, R0, P0;

key: IADD_R_P_R_UR_R_P

0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7
0	0	0	0	1	0	0	0	0	0	1	1	pred				operand 0								operand 2								operand 3								0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	cINV
0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7
operand 4								cINV	0	1	0	1	0	0	0	operand 1				0	0	operand 5				cNOT	1	0	0	0	0	0	0	0	0	0	0	0	0	0	stall				y	r-bar			w-bar			b-mask						reuse				0	0

IADD.XOR

R,P,R,R,R

distilled: @P0 IADD.XOR R0, P0, R0, R0, R0;

key: IADD_R_P_R_R_R

0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7
0	0	0	0	1	0	0	0	0	1	0	0	pred				operand 0								operand 2								operand 3								0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	cNEG
0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7
operand 4								cNEG	0	0	0	1	0	0	0	operand 1				0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	stall				y	r-bar			w-bar			b-mask						reuse				0	0

IADD.XOR

R,P,R,I,R

distilled: @P0 IADD.XOR R0, P0, R0, 0x0, R0;

key: IADD_R_P_R_I_R

0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7
0	0	0	0	1	0	0	0	0	0	0	1	pred				operand 0								operand 2								operand 3
0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7
operand 4								cNEG	0	0	0	1	0	0	0	operand 1				0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	stall				y	r-bar			w-bar			b-mask						reuse				0	0

IADD.XOR

R,P,R,UR,R

distilled: @P0 IADD.XOR R0, P0, R0, UR0, R0;

key: IADD_R_P_R_UR_R

0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7
0	0	0	0	1	0	0	0	0	0	1	1	pred				operand 0								operand 2								operand 3								0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	cNEG
0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7	0	1	2	3	4	5	6	7
operand 4								cNEG	0	0	0	1	0	0	0	operand 1				0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	stall				y	r-bar			w-bar			b-mask						reuse				0	0